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ltc3639 1 3639f for more information www.linear.com/ltc3639 typical a pplica t ion fea t ures descrip t ion high efficiency, 150v 100ma synchronous step-down regulator the lt c ? 3639 is a high efficiency step-down dc/dc regulator with internal high side and synchronous power switches that draws only 12a typical dc supply current while maintaining a regulated output voltage at no load. the ltc3639 can supply up to 100ma load current and features a programmable peak current limit that provides a simple method for optimizing efficiency and for reduc- ing output ripple and component size. the ltc3639s combination of burst mode ? operation, integrated power switches, low quiescent current, and programmable peak current limit provides high efficiency over a broad range of load currents. with its wide input range of 4v to 150v and programmable overvoltage lockout, the ltc3639 is a robust regulator suited for regulating from a wide variety of power sources. additionally, the ltc3639 includes a precise run threshold and soft-start feature to guarantee that the power system start-up is well-controlled in any environment. a feedback comparator output enables multiple ltc3639s to be con - nected in parallel for higher current applications. the ltc3639 is available in a thermally enhanced high voltage-capable 16-lead mse package with four missing pins. l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. efficiency and power loss vs load current 5v to 150v input to 5v output, 100ma step-down regulator a pplica t ions n wide operating input voltage range: 4v to 150v n synchronous operation for highest efficiency n internal high side and low side power mosfets n no compensation required n adjustable 10ma to 100ma maximum output current n low dropout operation: 100% duty cycle n low quiescent current: 12a n wide output range: 0.8v to v in n 0.8v 1% feedback voltage reference n precise run pin threshold n internal or external soft-start n programmable 1.8v, 3.3v , 5v or adjustable output n few external components required n programmable input overvoltage lockout n thermally enhanced high voltage msop package n industrial control supplies n medical devices n distributed power systems n portable instruments n battery-operated devices n automotive n avionics sw v in 5v to 150v ltc3639 470h 10f 3639 ta01a 1f 200v v out 5v 100ma gnd v fb ss v prg1 run ovlo v prg2 v in v in = 12v v in = 36v v in = 72v v in = 150v load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 10 1 100 1000 60 40 0.1 10 100 3639 ta01b 0 1 efficiency power loss v out = 5v
ltc3639 2 3639f for more information www.linear.com/ltc3639 a bsolu t e maxi m u m r a t ings 1 3 5 6 7 8 sw v in fbo v prg2 v prg1 gnd 16 14 12 11 10 9 gnd run ovlo i set ss v fb top view 17 gnd mse package variation: mse16 (12) 16-lead plastic msop t jmax = 150c, ja = 40c/w, jc = 10c/w exposed pad (pin 17) is gnd, must be soldered to pcb p in c on f igura t ion o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc3639emse#pbf ltc3639emse#trpbf 3639 16-lead plastic msop C40c to 125c ltc3639imse#pbf ltc3639imse#trpbf 3639 16-lead plastic msop C40c to 125c ltc3639hmse#pbf ltc3639hmse#trpbf 3639 16-lead plastic msop C40c to 150c ltc3639mpmse#pbf ltc3639mpmse#trpbf 3639 16-lead plastic msop C55c to 150c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ v in supply voltage ................................... C 0.3v to 150v run voltage ............................................. C0.3v to 150v ss, fbo, ovlo, i set voltages ...................... C 0.3v to 6v v fb , v prg1 , v prg2 voltages ......................... C 0.3v to 6v operating junction temperature range (notes 2, 3) ltc3639e, ltc3639i ......................... C4 0c to 125c ltc3639h .......................................... C 40c to 150c ltc3639mp ....................................... C 55c to 150c storage temperature range .................. C 65c to 150c lead temperature (soldering, 10 sec) ................... 3 00c (note 1) e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = 12v, unless otherwise noted. symbol parameter conditions min typ max units input supply (v in ) v in input voltage operating range 4 150 v v out output voltage operating range 0.8 v in v uvlo v in undervoltage lockout v in rising v in falling hysteresis l l 3.5 3.3 3.75 3.5 250 4.0 3.8 v v mv i q dc supply current (note 4) active mode sleep mode shutdown mode no load v run = 0v 150 12 1.4 350 22 6 a a a v run run pin threshold run rising run falling hysteresis 1.17 1.06 1.21 1.10 110 1.25 1.14 v v mv i run run pin leakage current run = 1.3v C10 0 10 na v ovlo ovlo pin threshold ovlo rising ovlo falling hysteresis 1.17 1.06 1.21 1.10 110 1.25 1.14 v v mv
ltc3639 3 3639f for more information www.linear.com/ltc3639 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = 12v, unless otherwise noted. symbol parameter conditions min typ max units output supply (v fb ) v fb(adj) feedback comparator threshold (adjustable output) v fb rising, v prg1 = v prg2 = 0v ltc3639e, ltc3639i ltc3639h, ltc3639mp l l 0.792 0.788 0.800 0.800 0.808 0.812 v v v fbh feedback comparator hysteresis (adjustable output) v fb falling, v prg1 = v prg2 = 0v l 3 5 9 mv i fb feedback pin current v fb = 1v, v prg1 = v prg2 = 0v C10 0 10 na v fb(fixed) feedback comparator thresholds (fixed output) v fb rising, v prg1 = ss, v prg2 = 0v v fb falling, v prg1 = ss, v prg2 = 0v l l 4.94 4.91 5.015 4.985 5.09 5.06 v v v fb rising, v prg1 = 0v, v prg2 = ss v fb falling, v prg1 = 0v, v prg2 = ss l l 3.26 3.24 3.31 3.29 3.36 3.34 v v v fb rising, v prg1 = v prg2 = ss v fb falling, v prg1 = v prg2 = ss l l 1.78 1.77 1.81 1.80 1.84 1.83 v v operation i peak peak current comparator threshold i set floating 100k resistor from i set to gnd i set shorted to gnd l l l 200 100 17 230 120 25 260 140 30 ma ma ma r on power switch on-resistance top switch bottom switch i sw = C50ma i sw = 50ma 4.2 2.2 i lsw switch pin leakage current v in = 150v, sw = 0v 0.1 1 a i ss soft-start pin pull-up current v ss < 2.5v 4 5 6 a t int(ss) internal soft-start time ss pin floating 1 ms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3639 is tested under pulsed load conditions such that t j t a . the ltc3639e is guaranteed to meet performance specifications from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3639i is guaranteed over the C40c to 125c operating junction temperature range, the ltc3639h is guaranteed over the C40c to 150c operating junction temperature range and the ltc3639mp is tested and guaranteed over the C55c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125c. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 3: the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ) where ja is 40c/w for the msop package. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 4: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information.
ltc3639 4 3639f for more information www.linear.com/ltc3639 typical p er f or m ance c harac t eris t ics peak current trip threshold vs r iset efficiency vs load current, v out = 5v peak current trip threshold vs temperature efficiency vs load current, v out = 3.3v peak current trip threshold vs input voltage efficiency vs load current, v out = 1.8v efficiency vs input voltage, v out = 5v feedback comparator trip threshold vs temperature run and ovlo comparator threshold vs temperature load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 3639 g01 0 1 i set open figure 14 circuit v in = 12v v in = 36v v in = 72v v in = 150v 30 90 100 20 10 80 50 70 60 40 0 0 25 75 100 50 125 150 v in voltage (v) efficiency (%) 3639 g04 i load = 100ma i load = 10ma i load = 1ma i set open figure 14 circuit temperature (c) ?55 798 threshold voltage (v) 799 800 801 802 ?25 5 35 65 3639 g05 95 125 155 r iset (k) 0 150 200 250 175 3639 g07 100 50 50 10075 25 125 150 200 0 peak current trip threshold (ma) temperature (c) ?55 peak current (ma) 100 200 155 3639 g08 50 0 5 65 ?25 35 95 125 150 250 300 i set open i set = gnd r iset = 100k v in voltage (v) 0 peak current (ma) 100 200 150 3639 g09 50 0 60 30 90 120 150 250 300 i set open i set = gnd r iset = 100k temperature (c) ?55 run or ovlo threshold voltage (v) 1.20 1.22 1.24 35 95 3639 g06 1.18 1.16 1.14 1.12 1.10 ?25 5 65 125 155 1.08 1.06 rising falling load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 3639 g02 0 1 i set open figure 14 circuit v in = 12v v in = 36v v in = 72v v in = 150v load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 3639 g03 0 1 i set open figure 14 circuit v in = 12v v in = 36v v in = 72v v in = 150v
ltc3639 5 3639f for more information www.linear.com/ltc3639 typical p er f or m ance c harac t eris t ics switch on-resistance vs input voltage switch on-resistance vs temperature load step transient response quiescent supply current vs input voltage operating waveforms, v in = 48v quiescent supply current vs temperature operating waveforms, v in = 150v switch leakage current vs temperature short-circuit and recovery v in voltage (v) 0 0 v in supply current (a) 15 60 90 3639 g10 10 5 30 120 150 sleep shutdown v in voltage (v) 1 switch on-resistance () 2 7 4 top 3639 g13 5 6 3 0 60 90 30 120 150 bottom temperature (c) ?55 switch on-resistance () 7 35 3639 g14 4 2 ?25 5 65 1 8 6 5 3 95 125 155 top bottom temperature (c) ?55 ?25 0 v in supply current (a) 10 30 25 5 65 95 3639 g11 5 20 15 35 125 155 v in = 150v sleep shutdown temperature (c) ?55 switch leakage current (a) 6 35 3639 g12 3 1 ?25 5 65 0 ?1 ?2 8 7 5 4 2 95 125 155 v in = 150v sw = 150v sw = 0v output voltage 50mv/div load current 50ma/div 200s/div v in = 48v v out = 3.3v 1ma to 100ma load step figure 15 circuit 3639 g15 output voltage 50mv/div switch voltage 20v/div inductor current 200ma/div 10s/div v in = 48v v out = 3.3v i out = 100ma figure 15 circuit 3639 g16 output voltage 50mv/div switch voltage 50v/div inductor current 200ma/div 10s/div v in = 150v v out = 3.3v i out = 50ma figure 15 circuit 3639 g17 output voltage 1v/div inductor current 100ma/div 500s/div figure 15 circuit 3639 g18
ltc3639 6 3639f for more information www.linear.com/ltc3639 p in func t ions sw (pin 1): switch node connection to inductor. this pin connects to the drains of the internal power mosfet switches. v in (pin 3): main supply pin. a ceramic bypass capacitor should be tied between this pin and gnd. fbo (pin 5): feedback comparator output. connect to the v fb pins of additional ltc3639s to combine the output current. the typical pull-up current is 20a. the typical pull- down impedance is 70. see applications information. v prg2 , v prg1 (pins 6, 7): output voltage selection. short both pins to ground for a resistive divider programmable output voltage. short v prg1 to ss and short v prg2 to ground for a 5v output voltage. short v prg1 to ground and short v prg2 to ss for a 3.3v output voltage. short both pins to ss for a 1.8v output voltage. gnd (pin 8, 16, exposed pad pin 17): ground. the ex- posed pad must be soldered to the pcb ground plane for rated thermal performance. v fb (pin 9): output voltage feedback. when configured for an adjustable output voltage, connect to an external resistive divider to divide the output voltage down for comparison to the 0.8v reference. for the fixed output configuration, directly connect this pin to the output. ss (pin 10): soft-start control input. a capacitor to ground at this pin sets the output voltage ramp time. a 50a current initially charges the soft-start capacitor until switching begins, at which time the current is reduced to its nominal value of 5a. the output voltage ramp time from zero to its regulated value is 1ms for every 6.25nf of capacitance from ss to gnd. if left floating, the ramp time defaults to an internal 1ms soft-start. i set (pin 11): peak current set input. a resistor from this pin to ground sets the peak current comparator threshold. leave floating for the maximum peak current (230ma typical) or short to ground for minimum peak current (25ma typical). the maximum output current is one-half the peak current. the 5a current that is sourced out of this pin when switching is reduced to 1a in sleep. op - tionally, a capacitor can be placed from this pin to gnd to trade off efficiency for light load output voltage ripple. see applications information. ovlo (pin 12): overvoltage lockout input. connect to the input supply through a resistor divider to set the over - voltage lockout level. a voltage on this pin above 1.21v disables the internal mosfet switches. normal operation resumes when the voltage on this pin decreases below 1.10v. exceeding the ovlo lockout threshold triggers a soft-start reset, resulting in a graceful recovery from an input supply transient. run (pin 14): run control input. a voltage on this pin above 1.21v enables normal operation. forcing this pin below 0.7v shuts down the ltc3639, reducing quiescent current to approximately 1.4a. optionally, connect to the input supply through a resistor divider to set the undervoltage lockout.
ltc3639 7 3639f for more information www.linear.com/ltc3639 b lock diagra m c out c in v out + ? + ? + ? + 3 ? + ? + + peak current comparator reverse current comparator feedback comparator voltage reference v prg2 gnd gnd ss ss v prg1 gnd ss gnd ss r1 1.0m 4.2m 2.5m 1.0m r2 800k 800k 800k v out adjustable 5v fixed 3.3v fixed 1.8v fixed start-up: 50a normal: 5a implement divider externally for adjustable version v in 1 sw l1 gnd logic and shoot- through prevention 16 ss r2 r1 5v 5v 20a fbo 70 10 5 gnd 8 gnd 17 v fb 9 v prg1 7 v prg2 3639 bd 6 0.800v ovlo 1.21v 12 1.21v run 14 i set 11 active: 5a sleep: 1a 1.3v
ltc3639 8 3639f for more information www.linear.com/ltc3639 o pera t ion the ltc3639 is a synchronous step-down dc/dc regulator with internal power switches that uses burst mode con- trol, combining low quiescent current with high switching frequency, which results in high efficiency across a wide range of load currents. burst mode operation functions by using short burst cycles to switch the inductor current through the internal power mosfets, followed by a sleep cycle where the power switches are off and the load cur - rent is supplied by the output capacitor. during the sleep cycle, the ltc3639 draws only 12a of supply current. at light loads, the burst cycles are a small percentage of the total cycle time which minimizes the average supply current, greatly improving efficiency. figure 1 shows an example of burst mode operation. the switching frequency is dependent on the inductor value, peak current, input voltage and output voltage. external feedback resistors (adjustable mode) can be used by connecting both v prg1 and v prg2 to ground. in adjustable mode the feedback comparator monitors the voltage on the v fb pin and compares it to an internal 800mv reference. if this voltage is greater than the refer - ence, the comparator activates a sleep mode in which the power switches and current comparators are disabled, reducing the v in pin supply current to only 12a. as the load current discharges the output capacitor, the voltage on the v fb pin decreases. when this voltage falls 5mv below the 800mv reference, the feedback comparator trips and enables burst cycles. at the beginning of the burst cycle, the internal high side power switch (p-channel mosfet) is turned on and the inductor current begins to ramp up. the inductor current increases until either the current exceeds the peak cur - rent comparator threshold or the voltage on the v fb pin exceeds 800mv, at which time the high side power switch is turned off and the low side power switch (n-channel mosfet) turns on. the inductor current ramps down until the reverse current comparator trips, signaling that the current is close to zero. if the voltage on the v fb pin is still less than the 800mv reference, the high side power switch is turned on again and another cycle commences. the average current during a burst cycle will normally be greater than the average load current. for this architecture, the maximum average output current is equal to half of the peak current. the hysteretic nature of this control architecture results in a switching frequency that is a function of the input voltage, output voltage, and inductor value. this behavior provides inherent short-circuit protection. if the output is shorted to ground, the inductor current will decay very slowly during a single switching cycle. since the high side switch turns on only when the inductor current is near zero, the ltc3639 inherently switches at a lower frequency during start-up or short-circuit conditions. burst frequency inductor current output voltage ?v out 3639 f01 burst cycle sleep cycle switching frequency figure 1. burst mode operation main control loop the ltc3639 uses the v prg1 and v prg2 control pins to connect internal feedback resistors to the v fb pin. this enables fixed outputs of 1.8v, 3.3v or 5v without increas - ing component count, input supply current or exposure to noise on the sensitive input to the feedback comparator. (refer to block diagram)
ltc3639 9 3639f for more information www.linear.com/ltc3639 start-up and shutdown if the voltage on the run pin is less than 0.7v, the ltc3639 enters a shutdown mode in which all internal circuitry is disabled, reducing the dc supply current to 1.4a. when the voltage on the run pin exceeds 1.21v, normal operation of the main control loop is enabled. the run pin comparator has 110mv of internal hysteresis, and therefore must fall below 1.1v to disable the main control loop. an internal 1ms soft-start function limits the ramp rate of the output voltage on start-up to prevent excessive input supply droop. if a longer ramp time and consequently less supply droop is desired, a capacitor can be placed from the ss pin to ground. the 5a current that is sourced out of this pin will create a smooth voltage ramp on the capacitor. if this ramp rate is slower than the internal 1ms soft-start, then the output voltage will be limited by the ramp rate on the ss pin instead. the internal and external soft-start functions are reset on start-up and after an undervoltage or overvoltage event on the input supply. peak inductor current programming the peak current comparator nominally limits the peak inductor current to 230ma. this peak inductor current can be adjusted by placing a resistor from the i set pin to ground. the 5a current sourced out of this pin through the resistor generates a voltage that adjusts the peak cur - rent comparator threshold. during sleep mode, the current sourced out of the i set pin is reduced to 1a. the i set current is increased back to 5a on the first switching cycle after exiting sleep mode. the i set current reduction in sleep mode, along with adding a filtering capacitor, c iset , from the i set pin to ground, provides a method of reducing light load output voltage ripple at the expense of lower efficiency and slightly de- graded load step transient response. o pera t ion for applications requiring higher output current, the ltc3639 provides a feedback comparator output pin (fbo) for combining the output current of multiple ltc3639s. by connecting the fbo pin of a master ltc3639 to the v fb pin of one or more slave ltc3639s, the output currents can be combined to source 100ma times the number of ltc3639s. dropout operation when the input supply decreases toward the output sup- ply, the duty cycle increases to maintain regulation. the p-channel mosfet top switch in the ltc3639 allows the duty cycle to increase all the way to 100%. at 100% duty cycle, the p-channel mosfet stays on continuously, providing output current equal to the peak current, which is twice the maximum load current when not in dropout. input undervoltage and overvoltage lockout the ltc3639 additionally implements protection features which inhibit switching when the input voltage is not within a programmable operating range. by use of a resistive divider from the input supply to ground, the run and ovlo pins serve as a precise input supply voltage moni - tor. switching is disabled when either the run pin falls below 1.1v or the ovlo pin rises above 1.21v, which can be configured to limit switching to a specific range of input supply voltage. furthermore, if the input voltage falls below 3.5v typical (3.8v maximum), an internal undervoltage detector disables switching. when switching is disabled, the ltc3639 can safely sustain input voltages up to the absolute maximum rating of 150v. input supply undervoltage or overvoltage events trigger a soft-start reset, which results in a graceful recovery from an input supply transient. (refer to block diagram)
ltc3639 10 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion the basic ltc3639 application circuit is shown on the front page of this data sheet. external component selection is determined by the maximum load current requirement and begins with the selection of the peak current programming resistor, r iset . the inductor value l can then be determined, followed by capacitors c in and c out . peak current resistor selection the peak current comparator has a maximum current limit of at least 200ma, which guarantees a maximum average current of 100ma. for applications that demand less current, the peak current threshold can be reduced to as little as 20ma. this lower peak current allows the efficiency and component selection to be optimized for lower current applications. the peak current threshold is linearly proportional to the voltage on the i set pin, with 100mv and 1v corresponding to 20ma and 200ma peak current respectively. this pin may be driven by an external voltage source to modulate the peak current, which may be beneficial in some appli- cations. usually, the peak current is programmed with an appropriately chosen resistor (r iset ) between the i set pin and ground. the voltage generated on the i set pin by r iset and the internal 5a current source sets the peak current. the value of resistor for a particular peak current can be computed by using figure 2 or the following equation: r iset = i peak ? 10 6 where 20ma < i peak < 200ma. the internal 5a current source is reduced to 1a in sleep mode to maximize efficiency and to facilitate a tradeoff between efficiency and light load output voltage ripple, as described in the optimizing output voltage ripple section. the peak current is internally limited to be within the range of 20ma to 200ma. shorting the i set pin to ground pro- grams the current limit to 20ma, and leaving it floating sets the current limit to the maximum value of 200ma. when selecting this resistor value, be aware that the maximum average output current for this architecture is limited to half of the peak current. therefore, be sure to select a value that sets the peak current with enough margin to provide adequate load current under all conditions. selecting the peak current to be 2.2 times greater than the maximum load current is a good starting point for most applications. inductor selection the inductor, input voltage, output voltage, and peak current determine the switching frequency during a burst cycle of the ltc3639. for a given input voltage, output voltage, and peak current, the inductor value sets the switching frequency during a burst cycle when the output is in regu- lation. generally, switching at a frequency between 50khz and 200khz yields high efficiency, and 100khz is a good first choice for many applications. the inductor value can be determined by the following equation: l = v out f ? i peak ? ? ? ? ? ? ? 1? v out v in ? ? ? ? ? ? the variation in switching frequency during a burst cycle with input voltage and inductance is shown in figure 3. for lower values of i peak , multiply the frequency in figure?3 by 230ma/i peak . an additional constraint on the inductor value is the ltc3639s 150ns minimum on-time of the high side switch. therefore, in order to keep the current in the inductor well-controlled, figure 2. r iset selection r iset (k) 0 current (ma) 150 200 250 25 75 100 125 3639 f02 50 100 0 50 150 175 200 typical peak inductor current maximum load current
ltc3639 11 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion the inductor value must be chosen so that it is larger than a minimum value which can be computed as follows: l > v in(max) ? t on(min) i peak ? 1.2 where v in(max) is the maximum input supply voltage when switching is enabled, t on(min) is 150ns, i peak is the peak current, and the factor of 1.2 accounts for typical inductor tolerance and variation over temperature. for applications that have large input supply transients, the ovlo pin can be used to disable switching above the maximum operating voltage v in(max) so that the minimum inductor value is not artificially limited by a transient condition. inductor values that violate the above equation will cause the peak current to overshoot and permanent damage to the part may occur. although the previous equation provides the minimum inductor value, higher efficiency is generally achieved with a larger inductor value, which produces a lower switching frequency. for a given inductor type, however, as induc - tance is increased dc resistance (dcr) also increases. higher dcr translates into higher copper losses and lower current rating, both of which place an upper limit on the inductance. the recommended range of inductor values for small surface mount inductors as a function of peak current is shown in figure 4. the values in this range are a good compromise between the trade-offs discussed above. for applications where board area is not a limiting factor, inductors with larger cores can be used, which extends the recommended range of figure?4 to larger values. inductor core selection once the value for l is known, the type of inductor must be selected. high efficiency regulators generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of the more expensive ferrite cores. actual core loss is independent of core size for a fixed inductor value but is very dependent of the inductance selected. as the inductance increases, core losses decrease. un- fortunately, increased inductance requires more turns of wire and therefore copper losses will increase. ferrite designs have very low core losses and are pre - ferred at high switching frequencies, so design goals can concentrate on copper loss and preventing satura- tion. ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequently output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy but generally cost more than powdered iron core inductors with similar charac- teristics. the choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/emi requirements. new designs for surface mount inductors are available from coiltronics, coilcraft, tdk, toko, and sumida. figure 4. recommended inductor values for maximum efficiency figure 3. switching frequency for v out = 3.3v v in input voltage (v) 0 switching frequency (khz) 100 120 140 150 120 3639 f03 80 60 0 30 60 90 40 20 i set open l = 100h l = 220h l = 330h peak inductor current (ma) 10 100 inductor value (h) 1000 10000 300 100 3639 f04
ltc3639 12 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion c in and c out selection the input capacitor, c in , is needed to filter the trapezoidal current at the source of the top high side mosfet. c in should be sized to provide the energy required to magnetize the inductor without causing a large decrease in input voltage (?v in ). the relationship between c in and ?v in is given by: c in > l ? i peak 2 2 ? v in ? ? v in it is recommended to use a larger value for c in than calculated by the previous equation since capacitance decreases with applied voltage. in general, a 1f x7r ce - ramic capacitor is a good choice for c in in most ltc3639 applications. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current should be used. rms current is given by: i rms = i out(max) ? v out v in ? v in v out ? 1 this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based only on 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the output capacitor, c out , filters the inductors ripple current and stores energy to satisfy the load current when the ltc3639 is in sleep. the output ripple has a lower limit of v out /160 due to the 5mv typical hysteresis of the feed- back comparator. the time delay of the comparator adds an additional ripple voltage that is a function of the load current. during this delay time, the ltc3639 continues to switch and supply current to the output. the output ripple can be approximated by: ? v out i peak 2 ?i load ? ? ? ? ? ? ? 4 ? 10 ?6 c out + v out 160 the output ripple is a maximum at no load and approaches lower limit of v out /160 at full load. choose the output capacitor c out to limit the output voltage ripple ?v out using the following equation: c out i peak ? 2 ? 10 ?6 ? v out ? v out 160 the value of the output capacitor must also be large enough to accept the energy stored in the inductor without a large change in output voltage during a single switching cycle. setting this voltage step equal to 1% of the output voltage, the output capacitor must be: c out > l 2 ? i peak v out ? ? ? ? ? ? 2 ? 100% 1% typically, a capacitor that satisfies the voltage ripple re - quirement is adequate to filter the inductor ripple. to avoid overheating, the output capacitor must also be sized to handle the ripple current generated by the inductor. the worst-case ripple current in the output capacitor is given by i rms = i peak /2. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important only to use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long- term reliability. ceramic capacitors have excellent low esr characteristics but can have high voltage coefficient and audible piezoelectric effects. the high quality factor (q) of ceramic capacitors in series with trace inductance can also lead to significant input voltage ringing.
ltc3639 13 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion input voltage steps if the input voltage falls below the regulated output volt- age, the body diode of the internal high side mosfet will conduct current from the output supply to the input sup- ply. if the input voltage falls rapidly, the voltage across the inductor will be significant and may saturate the inductor. a large current will then flow through the high side mosfet body diode, resulting in excessive power dissipation that may damage the part. if rapid voltage steps are expected on the input supply, put a small silicon or schottky diode in series with the v in pin to prevent reverse current and inductor saturation, shown below as d1 in figure 5. the diode should be sized for a reverse voltage of greater than the regulated output volt - age, and to withstand repetitive currents higher than the maximum peak current of the ltc3639. of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. for applications with inductive source impedance, such as a long wire, a series rc network may be required in parallel with c in to dampen the ringing of the input supply. figure 6 shows this circuit and the typical values required to dampen the ringing. refer to application note 88 for ad - ditional information on suppressing input supply transients. r = l in c in 4 ? c in c in l in 3639 f06 v in ltc3639 figure 6. series rc to reduce v in ringing figure 5. preventing current flow to the input ceramic capacitors and audible noise higher value, lower cost ceramic capacitors are now be- coming available in smaller case sizes. their high ripple current, high voltage rating, and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush sw input supply ltc3639 c out 3639 f05 c in v out v in l d1 ceramic capacitors are also piezoelectric. the ltc3639s burst frequency depends on the load current, and in some applications the ltc3639 can excite the ceramic capaci - tor at audio frequencies, generating audible noise. this noise is typically very quiet to a casual ear; however, if the noise is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. output voltage programming the ltc3639 has three fixed output voltage modes and an adjustable mode that can be selected with the v prg1 and v prg2 pins. the fixed output modes use an internal feedback divider which enables higher efficiency, higher noise immunity, and lower output voltage ripple for 5v, 3.3v, and 1.8v applications. to select the fixed 5v output voltage, connect v prg1 to ss and v prg2 to gnd. for 3.3v, connect v prg1 to gnd and v prg2 to ss. for 1.8v, connect both v prg1 and v prg2 to ss. for any of the fixed output voltage options, directly connect the v fb pin to v out .
ltc3639 14 3639f for more information www.linear.com/ltc3639 4.2m r1 5v r2 3639 f08 v out 800k 0.8v v fb ss v prg1 v prg2 ltc3639 figure 8. setting the output voltage with external and internal resistors v fb v out r2 3639 f07 0.8v r1 v prg1 v prg2 ltc3639 figure 7. setting the output voltage with external resistors a pplica t ions i n f or m a t ion for the adjustable output mode (v prg1 = v prg2 = gnd), the output voltage is set by an external resistive divider according to the following equation: v out = 0.8v ? 1 + r1 r2 ? ? ? ? ? ? the resistive divider allows the v fb pin to sense a fraction of the output voltage as shown in figure 7. the output voltage can range from 0.8v to v in . be careful to keep the divider resistors very close to the v fb pin to minimize noise pick-up on the sensitive v fb trace. to minimize the no-load supply current, resistor values in the megohm range may be used; however, large resistor values should be used with caution. the feedback divider is the only load current when in shutdown. if pcb leakage current to the output node or switch node exceeds the load current, the output voltage will be pulled up. in normal operation, this is generally a minor concern since the load current is much greater than the leakage. to avoid excessively large values of r1 in high output volt - age applications (v out 10v), a combination of external and internal resistors can be used to set the output volt- age. this has an additional benefit of increasing the noise immunity on the v fb pin. figure 8 shows the ltc3639 with the v fb pin configured for a 5v fixed output with an external divider to generate a higher output voltage. the internal 5m resistance appears in parallel with r2, and the value of r2 must be adjusted accordingly. r2 should be chosen to be less than 200k to keep the output voltage variation less than 1% due to the tolerance of the ltc3639s internal resistor. run pin and overvoltage/undervoltage lockout the ltc3639 has a low power shutdown mode controlled by the run pin. pulling the run pin below 0.7v puts the ltc3639 into a low quiescent current shutdown mode (i q ~ 1.4a). when the run pin is greater than 1.21v, switching is enabled. figure 9 shows examples of con- figurations for driving the run pin from logic. the run and ovlo pins can alternatively be configured as precise undervoltage (uvlo) and overvoltage (ovlo) lockouts on the v in supply with a resistive divider from v in to ground. a simple resistive divider can be used as shown in figure 10 to meet specific v in voltage requirements. the current that flows through the r3-r4-r5 divider will directly add to the shutdown, sleep, and active current of the ltc3639, and care should be taken to minimize the impact of this current on the overall efficiency of the ap- plication circuit. resistor values in the megohm range may be required to keep the impact on quiescent shutdown and sleep currents low. to pick resistor values, the sum total of r3 + r4 + r5 (r total ) should be chosen first based on the allowable dc current that can be drawn from v in .
ltc3639 15 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion be aware that the ovlo pin cannot be allowed to exceed its absolute maximum rating of 6v. to keep the voltage on the ovlo pin from exceeding 6v, the following relation should be satisfied: v in(max) ? r5 r3 + r4 + r5 ? ? ? ? ? ? < 6v soft-start soft-start is implemented by ramping the effective refer - ence voltage from 0v to 0.8v. to increase the duration of the reference voltage soft-start, place a capacitor from the ss pin to ground. an internal 5a pull-up current will charge this capacitor. the value of the soft-start capacitor can be calculated by the following equation: c ss = soft-start time ? 5a 0.8v the minimum soft-start time is limited to the internal soft-start timer of 1ms. when the ltc3639 detects a fault condition (input supply undervoltage or overvoltage) or when the run pin falls below 1.1v, the ss pin is quickly pulled to ground and the internal soft-start timer is reset. this ensures an orderly restart when using an external soft-start capacitor. note that the soft-start capacitor may not be the limiting factor in the output voltage ramp. the maximum output current, which is equal to half of the peak current, must charge the output capacitor from 0v to its regulated value. for small peak currents or large output capacitors, this ramp time can be significant. therefore, the output voltage ramp time from 0v to the regulated v out value is limited to a minimum of ramp time 2c out i peak v out run supply ltc3639 run 3639 f09 4.7m v in ltc3639 figure 9. run pin interface to logic figure 10. adjustable uv and ov lockout run 3639 f10 r3 v in ltc3639 r4 r5 ovlo the individual values of r3, r4 and r5 can then be cal - culated from the following equations: r5 = r total ? 1.21v rising v in ovlo threshold r4 = r total ? 1.21v rising v in uvlo threshold ?r5 r3 = r total ?r5 ?r4 for applications that do not need a precise external ovlo, the ovlo pin can be tied directly to ground. the run pin in this type of application can be used as an external uvlo using the previous equations with r5 = 0. similarly, for applications that do not require a precise uvlo, the run pin can be tied to v in . in this configuration, the uvlo threshold is limited to the internal v in uvlo thresholds as shown in the electrical characteristics table. the resistor values for the ovlo can be computed using the previous equations with r3 = 0.
ltc3639 16 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion optimizing output voltage ripple after the peak current resistor and inductor have been selected to meet the load current and frequency require - ments, an optional capacitor, c iset can be added in parallel with r iset to reduce the output voltage ripple dependency on load current. at light loads the output voltage ripple will be a maximum. the peak inductor current is controlled by the voltage on the i set pin. the current out of the i set pin is 5a while the ltc3639 is active and is reduced to 1a during sleep mode. the i set current will return to 5a on the first switching cycle after sleep mode. placing a parallel rc network to ground on the i set pin filters the i set voltage as the ltc3639 enters and exits sleep mode, which in turn will affect the output voltage ripple, efficiency, and load step transient performance. higher current applications for applications that require more than 100ma, the ltc3639 provides a feedback comparator output pin (fbo) for driving additional ltc3639s. when the fbo pin of a master ltc3639 is connected to the v fb pin of one or more slave ltc3639s, the master controls the burst cycle of the slaves. figure 11 shows an example of a 5v, 200ma regulator using two ltc3639s. the master is configured for a 5v fixed output with external soft-start and v in uvlo/ovlo levels set by the run and ovlo pins. since the slave is directly controlled by the master, its ss pin should be float - ing, run should be tied to v in , and ovlo should be tied to ground. furthermore, the slave should be configured for a 1.8v fixed output (v prg1 = v prg2 = ss) to set the v fb pin threshold at 1.8v. the inductors l1 and l2 do not necessarily have to be the same, but should both meet the criteria described in the inductor selection section. efficiency considerations the efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percent- age of input power . although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: v in operating current and i 2 r losses. the v in operating current dominates the efficiency loss at very low load currents whereas the i 2 r loss dominates the efficiency loss at medium to high load currents. 1. the v in operating current comprises two components: the dc supply current as given in the electrical charac- teristics and the internal mosfet gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, ?q, moves from v in to ground. the resulting ?q/dt is the current out of v in that is typically larger than the dc bias current. v fb sw l1 l2 v in run r3 c in c out v out 5v 200ma c ss v in r4 r5 ovlo ss v prg1 v prg2 fbo ltc3639 (master) sw v fb v in run ovlo ss v prg1 v prg2 fbo 3639 f11 ltc3639 (slave) figure 11. 5v, 200ma regulator
ltc3639 17 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion 2. i 2 r losses are calculated from the resistances of the internal switches, r sw and external inductor r l . when switching, the average output current flowing through the inductor is chopped between the high side pmos switch and the low side nmos switch. thus, the series resistance looking back into the switch pin is a function of the top and bottom switch r ds(on) values and the duty cycle (dc = v out /v in ) as follows: r sw = (r ds(on)top )dc + (r ds(on)bot )(1 C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteris - tics curves. thus, to obtain the i 2 r losses, simply add r sw to r l and multiply the result by the square of the average output current: i 2 r loss = i o 2 (r sw + r l ) other losses, including c in and c out esr dissipative losses and inductor core losses, generally account for less than 2% of the total power loss. thermal considerations in most applications, the ltc3639 does not dissipate much heat due to its high efficiency. but, in applications where the ltc3639 is running at high ambient temperature with low supply voltage and high duty cycles, such as dropout, the heat dissipated may exceed the maximum junction temperature of the part. to prevent the ltc3639 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junc- tion temperature of the part. the temperature rise from ambient to junction is given by: t r = p d ? ja where p d is the power dissipated by the regulator and ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature is given by: t j = t a + t r generally, the worst-case power dissipation is in dropout at low input voltage. in dropout, the ltc3639 can provide a dc current as high as the full 230ma peak current to the output. at low input voltage, this current flows through a higher resistance mosfet, which dissipates more power. as an example, consider the ltc3639 in dropout at an input voltage of 5v, a load current of 230ma and an ambient temperature of 85c. from the typical performance graphs of switch on-resistance, the r ds(on) of the top switch at v in = 5v and 100c is approximately 7.5. therefore, the power dissipated by the part is: p d = (i load ) 2 ? r ds(on) = (230ma) 2 ? 7.5 = 0.4w for the msop package the ja is 40c/w. thus, the junc - tion temperature of the regulator is: t j = 85 c + 0.4w ? 40 c w = 101 c which is below the maximum junction temperature of 150c. pin clearance/creepage considerations the ltc3639 mse package has been uniquely designed to meet high voltage clearance and creepage requirements. pins 2, 4, 13, and 15 are omitted to increase the spac- ing between adjacent high voltage solder pads (v in , sw, and run) to a minimum of 0.657mm which is sufficient for most applications. for more information, refer to the printed circuit board design standards described in ipc- 2221 (www.ipc.org). design example as a design example, consider using the ltc3639 in an application with the following specifications: v in = 36v to 72v (48v nominal), v out = 12v, i out = 100ma, f = 200khz, and that switching is enabled when v in is between 30v and 90v.
ltc3639 18 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion first, calculate the inductor value based on the switching frequency: l = 12v 200khz ? 0.23a ? ? ? ? ? ? ? 1? 12v 48v ? ? ? ? ? ? ? 196h choose a 220h inductor as a standard value. next, verify that this meets the l min requirement at the maximum input voltage: l min = 90v ? 150ns 0.23a ? 1.2 = 70h therefore, the minimum inductor requirement is satisfied and the 220h inductor value may be used. next, c in and c out are selected. for this design, c in should be sized for a current rating of at least: i rms = 100ma ? 12v 36v ? 36v 12v ? 1 ? 47ma rms the value of c in is selected to keep the input from droop- ing less than 360mv (1%) at low line: c in > 220h ? 0.23a 2 2 ? 36v ? 360mv ? 0.45f since the capacitance of capacitors decreases with dc bias, a 1f capacitor should be chosen. c out will be selected based on a value large enough to satisfy the output voltage ripple requirement. for a 1% output ripple (120mv), the value of the output capacitor can be calculated from: c out 0.23a ? 2 ? 10 ?6 120mv ? 12v 160 ? 10f c out also needs an esr that will satisfy the output voltage ripple requirement. the required esr can be calculated from: esr < 120mv 0.23a ? 522m a 10f ceramic capacitor has significantly less esr than 522m. the output voltage can now be programmed by choosing the values of r1 and r2. since the output volt- age is higher than 10v, the ltc3639 should be set for a 5v fixed output with an external divider to divide the 12v output down to 5v. r2 is chosen to be less than 200k to keep the output voltage variation to less than 1% due to the internal 5m resistor tolerance. set r2 = 196k and calculate r1 as: ? r1 = 12v ? 5v 5v ? 196k ? 5m ( ) = 264k choose a standard value of 267k for r1. the undervoltage and overvoltage lockout requirements on v in can be satisfied with a resistive divider from v in to the run and ovlo pins (refer to figure 10). choose r3 + r4 + r5 = 2.5m to minimize the loading on v in . calculate r3, r4 and r5 as follows: r5 = 1.21v ? 2.5m v in _ ov(rising) = 33.6k r4 = 1.21v ? 2.5m v in _ uv(rising) ?r5 = 67.2k r3 = 2.5m ?r4 ?r5 = 2.4m since specific resistor values in the megohm range are generally less available, it may be necessary to scale r3, r4, and r5 to a standard value of r3. for this example,
ltc3639 19 3639f for more information www.linear.com/ltc3639 a pplica t ions i n f or m a t ion choose r3 = 2.2m and scale r4 and r5 by 2.2m/2.4m. then, r4 = 61.6k and r5 = 30.8k. choose standard values of r3 = 2.2m, r4 = 62k, and r5 = 30.9k. note that the fall- ing thresholds for both uvlo and ovlo will be 10% less than the rising thresholds, or 27v and 81v respectively. the i set pin should be left open in this example to select maximum peak current (230ma). figure 12 shows a complete schematic for this design example. 2. connect the (+) terminal of the input capacitor, c in , as close as possible to the v in pin. this capacitor provides the ac current into the internal power mosfets. 3. keep the switching node, sw, away from all sensitive small signal nodes. the rapid transitions on the switching node can couple to high impedance nodes, in particular v fb , and create increased output ripple. 3639 f12 v fb i set fbo sw 220h v in run 2.2m 267k 196k 1f 10f v out 12v 100ma v in 36v to 72v 62k 30.9k ovlo v prg2 ltc3639 ss v prg1 gnd figure 12. 36v to 72v input to 12v output, 100ma regulator v fb i set sw l1 v in run r3 r1 r2 c in c out v out v in r4 r iset r5 ovlo v prg1 ss v prg2 ltc3639 gnd fbo c ss 3639 f13 c out v out v in gnd gnd r3 r iset c ss r5 vias to ground plane vias to input supply (v in ) vias to output supply (v out ) outline of local ground plane r4 r1 r2 l1 c in figure 13. example pcb layout pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc3639. check the following in your layout: 1. large switched currents flow in the power switches and input capacitor. the loop formed by these compo - nents should be as small as possible. a ground plane is recommended to minimize ground impedance.
ltc3639 20 3639f for more information www.linear.com/ltc3639 v in input voltage (v) 0 efficiency (%) 85 90 95 150 120 3639 f14b 80 75 60 30 60 90 70 65 i out = 50ma v out = 5v v out = 3.3v v out = 1.8v v in input voltage (v) 0 maximum load current (ma) 80 90 100 150 120 3639 ta04b 70 60 20 30 30 60 90 50 40 v out = ?5v v out = ?15v output voltage 500mv/div 10ms/div 3639 f15b c in : tdk c5750x7r2e105k c out : tdk c3216x7r1c106m l1: tdk slf12555t-102mr34 *v out = v in for v in < 5v 3639 f14 v fb i set sw l1 1000h v in run c in 1f 250v c out 10f 10v v out * 5v 100ma v in 4v to 150v ss ovlo v prg1 v prg2 ltc3639 gnd fbo efficiency vs input voltage typical a pplica t ions 4v to 135v input to C15v output positive-to-negative regulator c in : tdk c5750x7r2e105k l1: coilcraft lps6235-154ml 3639 f15 v fb i set sw l1 150h v in run c in 1f 250v c out 22f 6.3v x5r v out 3.3v 100ma v in 4v to 150v ss ovlo v prg1 v prg2 ltc3639 gnd fbo 220pf 470nf 220k 3639 ta04a v fb i set sw l1 220h v in run c in 1f 200v c out 10f 25v v out ?15v v in 4v to 135v ss ovlo v prg1 v prg2 ltc3639 gnd fbo 200k 102k maximum load current v in v in + v out ? i peak 2 c in : vishay vj2225y105kxca c out : avx 12103c106kat l1: sumida cdrh105rnp-221nc soft-start waveform maximum load current vs input voltage figure 14. high efficiency 100ma regulator figure 15. low output voltage ripple 100ma regulator with 75ms soft-start
ltc3639 21 3639f for more information www.linear.com/ltc3639 l1 current 200ma/div v in /v out 5v/div l2 current 200ma/div 1s/div 3639 ta05b v in v out l1 current 200ma/div v in 50v/div v out 10v/div l2 current 200ma/div 100ms/div 3639 ta05c transient to 150v 72v load current (ma) 0 peak-to-peak output voltage ripple (mv) 35 40 45 5040 3639 ta03b 30 25 0 10 20 30 20 10 15 5 c out = 47f c set = open c out = 47f c set = 1nf c out = 100f c set = 1nf v in = 36v 4v to 150v input to 1.2v/50ma output regulator with low output voltage ripple c in : avx 2225pc105mat1a c out : kemet c1210c107m9pac l1: cooper sd25-331 3639 ta03a v fb i set sw l1 330h v in run c in 1f 250v c out 100f v out 1.2v 50ma v in 4v to 150v ss ovlo v prg1 v prg2 ltc3639 gnd fbo c set 1nf 100k 200k 100k low dropout startup and shutdown overvoltage lockout operation output voltage ripple vs load current typical a pplica t ions 3639 ta05a v fb i set sw l1 100h v in run c in1 1f 200v c in2 1f 200v c out 22f 16v v out * 12v 200ma v in 4v to 90v up to 150v transient ss fbo v prg1 v prg2 ovlo ltc3639 (master) gnd v fb i set sw l2 100h v in run ss fbo v prg1 v prg2 ovlo ltc3639 (slave) gnd 1m 13.7k 267k 196k c in1 /c in2 : vishay vj2225y105kxca c out : tdk c3225x7r1c226m l1/l2: tdk slf7045t-101mr60-1 *v out = v in for v in < 12v 4v to 90v input to 12v/200ma output regulator with overvoltage lockout
ltc3639 22 3639f for more information www.linear.com/ltc3639 typical a pplica t ions 40v to 150v input to 36v/100ma output with 25ma input current limit 5v to 150v input to 5v/100ma output with 20khz minimum burst frequency c in : murata grm55dr72e105kw01l c out : tdk c3225x7r1h225m l1: wrth 744 778 922 2 3639 ta06a v fb ss sw l1 220h v in run c in 1f 250v c out 2.2f 50v v out 36v 100ma* v in 40v to 150v i set ovlo ltc3639 gnd fbo 221k 35.7k r1 715k r2 5k v prg1 v prg2 input current limit = v out 10 ? r2 r1 + r2 ? 1 + 5a ? r1 v in ? ? ? ? ? ? v out 10 ? r2 r1 + r2 *maximum load current = v in 36v ? 25ma 100ma maximum load and input current vs input voltage input current vs load current burst frequency vs load current 3639 ta08a v fb sw l1 220h v in run c in 1f 250v c out 10f 10v v out 5v 100ma v in 5v to 150v v prg1 v prg2 ovlo ltc3639 gnd i set fbo ss 953k 30 2n7000 100k 200k out set v + in div ltc6994-1 gnd c in : kemet c2225c105karactu c out : murata grm40x5r106k10h520 l1: bourns srr1005-221kct-nd v in input voltage (v) 40 maximum current (ma) 80 100 120 150140130120110 3639 ta06b 60 0 20 50 807060 10090 40 maximum load current maximum input current load current (ma) burst frequency (khz) 100 1 10 0.1 10 100 3639 ta08b 0.1 1 without burst frequency limit with burst frequency limit v in = 36v load current (ma) input current (ma) 100 1 10 0.1 10 100 3639 ta08c 0.01 0.1 1 without burst frequency limit with burst frequency limit v in = 36v
ltc3639 23 3639f for more information www.linear.com/ltc3639 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. msop (mse16(12)) 0911 rev c 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1.0 (.039) bsc 1.0 (.039) bsc 16 16 14 121110 1 3 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package variation: mse16 (12) 16-lead plastic msop with 4 pins removed exposed die pad (reference ltc dwg # 05-08-1871 rev c) p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc3639 24 3639f for more information www.linear.com/ltc3639 ? linear technology corporation 2013 lt 0413 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc3639 r ela t e d p ar t s typical a pplica t ion 12v/100ma automotive supply c in : avx 2225pc105mat1a c out : kemet c1206c475k4rac l1: coilcraft mss1048t-474kl *v out = v in for v in < 12v 3639 ta07 v fb ss sw l1 470h v in run c in 1f 250v x7r c out 4.7f 16v x7r v in 4v to 150v v out 12v* 100ma i set ovlo ltc3639 gnd fbo 267k 196k v prg1 v prg2 part number description comments ltc3630 65v, 500ma synchronous step-down dc/dc converter v in : 4v to 65v, v out(min) = 0.8v, i q = 12a, i sd < 3a, 3mm 5mm dfn16, msop16e packages ltc3642 45v (transient to 60v), 50ma synchronous step- down dc/dc converter v in : 4.5v to 45v, v out(min) = 0.8v, i q = 12a, i sd < 3a, 3mm 3mm dfn8, msop8 packages ltc3631/ltc3631-3.3 ltc3631-5 45v (transient to 60v), 100ma synchronous step- down dc/dc converter v in : 4.5v to 45v, v out(min) = 0.8v, i q = 12a, i sd < 3a, 3mm 3mm dfn8, msop8 packages ltc3632 50v (transient to 60v), 20ma synchronous step- down dc/dc converter v in : 4.5v to 45v, v out(min) = 0.8v, i q = 12a, i sd < 3a, 3mm 3mm dfn8, msop8 packages lt ? 3990/lt3990-3.3/ lt3990-5 62v, 350ma 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in : 4.2v to 62v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 2mm dfn10, msop10 packages lt3970/lt3970-3.3 lt3970-5 40v, 350ma 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in : 4.2v to 40v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 2mm dfn10, msop10 packages ltc3810 100v synchronous step-down dc/dc controller v in : 6.4v to 100v, v out(min) = 0.8v, i q = 2ma, i sd < 240a, ssop28 package ltc3891 60v synchronous step-down dc/dc controller with burst mode operation v in : 4v to 60v, v out(min) = 0.8v, i q = 50a, i sd < 14a, 3mm 4mm qfn20, tssop20e packages efficiency and power loss vs load current v in = 24v v in = 48v v in = 120v load current (ma) 30 efficiency (%) power loss (mw) 90 100 20 10 80 50 70 10 1 100 1000 60 40 0.1 10 100 3639 ta07b 0 1 efficiency power loss

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